FPGA Design Verification Consultant
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FPGA Design Verification Consultant
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Job Title
FPGA Design Verification Consultant (Verilog/VHDL)
Total years of Experience
10+ Years
Specific Work Location
Tokyo, Japan (Onsite)
Job Type
Full Time
Working Hours
9:00 AM to 5:00 PM
Key Responsibilities
- Conduct circuit studies and create detailed design and RTL.
- Develop verification specifications and environments.
- Implement and verify FPGA designs, evaluate actual machines.
- Extract and verify items from design specifications.
- Construct verification environments and prepare necessary equipment.
- Collect coverage information and prepare verification reports.
Requirements
- Minimum 3 years of Verilog/VHDL design and verification experience.
- Hardware knowledge of imaging or communication systems.
Good to Have
- Knowledge of C language.
- Verification experience using System Verilog.
To apply now, contact leelalavanya.gujjarlapudi@websynergies.com
About Web Synergies
Web Synergies is a global IT company headquartered in 𝐒𝐢𝐧𝐠𝐚𝐩𝐨𝐫𝐞 with offices in India, Japan UAE, USA and Vietnam that provides innovative consulting services and solutions to companies. We help organizations stay ahead of change and achieve long-term success based on business transformation. Our teams design and implement winning strategies for clients by harnessing the power of new technologies and tailoring them to specific business transformation requirements.
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